中文 EN

4.3.1. Address space mapping

4.3.1.1. Overview

Address space is a logical concept used to unify all memory units and peripheral controllers that can be accessed by a unified addressing processor, such as:

  • Boot ROM: A solidified memory that stores the initial startup code.

  • SRAM: High-speed memory inside the chip, used to store critical code or temporary data.

  • DDR: External dynamic random memory, providing large-capacity storage space for operating systems, applications and large-scale data processing.

  • Registers for peripheral controllers: hardware registers for controlling and operating peripheral modules in the chip.

  • Reserved area: address space for actual purpose not allocated, reserved for future expansion or upgrade

Through a unified address space design, the processor can efficiently access and manage various resources in the system.

The X5 address space is as follows:

Start Address Interpretation Address Domain Size Description
0x0_0000_0000 0x0_0001_FFFF Boot ROM 128KB Boot ROM
0x0_0002_0000 0x0_1FE7_FFFF Reserved 510.375MB Reserved
0x0_1FE8_0000 0x0_1FEF_FFFF SRAM 0 512KB SRAM 0
0x0_1FF0_0000 0x0_1FFF_FFFF SRAM 1 1024KB SRAM 1
0x0_2000_0000 0x0_2001_FFFF AON SRAM 128KB AON-SRAM
0x0_2020_0000 0x0_2022_FFFF HIFI5 SRAM 192KB HIFI5 internal RAM
0x0_2023_0000 0x0_202F_FFFF Reserved 832KB Reserved
0x0_2030_0000 0x0_203F_FFFF secure 1MB secure-IP
0x0_2040_0000 0x0_2040_FFFF N/A 64KB reserved
0x0_2041_0000 0x0_204F_FFFF Reserved 960KB Reserved
0x0_2050_0000 0x0_2050_FFFF CPU_NOC 64KB CPU_NOC
0x0_2051_0000 0x0_2051_FFFF NOC_APB 64KB VIN_NOC
0x0_2052_0000 0x0_2052_FFFF 64KB BPU_NOC
0x0_2053_0000 0x0_2053_FFFF 64KB Codec_NOC
0x0_2054_0000 0x0_2054_FFFF 64KB GPU_NOC
0x0_2055_0000 0x0_2055_FFFF 64KB HSIO_NOC
0x0_2056_0000 0x0_2056_FFFF 64KB HIFI5_NOC
0x0_2057_0000 0x0_2057_FFFF 64KB AXIS_NOC
0x0_2058_0000 0x0_2BFF_FFFF Reserved 186.5MB Reserved
0x0_2c00_0000 0x0_2c01_3FFF CoreSight 80KB a55 System debug component
0x0_2C00_A000 0x0_2CFF_FFFF Reserved 15.9609375MB Reserved
0x0_2D00_0000 0x0_2DFF_FFFF CoreSight 16MB CoreSight cluster debug
0x0_2E00_0000 0x0_2FFF_FFFF CoreSight 32MB Reserved
0x0_3000_0000 0x0_300F_FFFF reserved 1MB Reserved
0x0_3010_0000 0x0_3024_FFFF GIC 1.3125MB GPU_GIC
0x0_3025_0000 0x0_30FF_FFFF Reserved 13.6875MB Reserved
0x0_3100_0000 0x0_3100_FFFF AON-APB 64KB GPIO
0x0_3101_0000 0x0_3101_FFFF 64KB RTC
0x0_3102_0000 0x0_3102_FFFF 64KB AON_CRM
0x0_3103_0000 0x0_3103_FFFF 64KB PMU
0x0_3104_0000 0x0_3104_7FFF 32KB NON_SEC_SLCR
0x0_3104_8000 0x0_3104_FFFF 32KB SEC_SLCR
0x0_3105_0000 0x0_3105_FFFF 64KB Function TS
0x0_3106_0000 0x0_3106_FFFF 64KB mpu
0x0_3107_0000 0x0_3107_FFFF 64KB Function TS read only
0x0_3108_0000 0x0_3207_FFFF Reserved 16MB Reserved
0x0_3208_0000 0x0_3208_FFFF DSP-APB 64KB AXI-DMA
0x0_3209_0000 0x0_3209_FFFF 64KB Timer
0x0_320A_0000 0x0_320A_FFFF 64KB I2C
0x0_320B_0000 0x0_320B_FFFF 64KB I2S0
0x0_320C_0000 0x0_320C_FFFF 64KB I2S1
0x0_320D_0000 0x0_320D_FFFF 64KB PDM
0x0_320E_0000 0x0_320E_FFFF 64KB reserved
0x0_320F_0000 0x0_320F_FFFF 64KB reserved
0x0_3210_0000 0x0_3210_FFFF 64KB reserved
0x0_3211_0000 0x0_3211_FFFF 64KB SPI
0x0_3212_0000 0x0_3212_FFFF 64KB UART
0x0_3213_0000 0x0_3213_FFFF 64KB SLCR
0x0_3214_0000 0x0_3214_FFFF 64KB CRM
0x0_3215_0000 0x0_3215_FFFF 64KB GPIO
0x0_3216_0000 0x0_3216_FFFF 64KB MPU_0
0x0_3217_0000 0x0_3217_FFFF 64KB MPU_1
0x0_3218_0000 0x0_3218_FFFF Reserved 64KB reserved
0x0_3219_0000 0x0_3219_FFFF Reserved 64KB reserved
0x0_321a_0000 0x0_321F_FFFF Reserved 384KB Reserved
0x0_3300_0000 0x0_3300_FFFF DSP-SUB 64KB mailbox
0x0_3301_0000 0x0_33FF_FFFF Reserved 15.9375MB Reserved
0x0_3400_0000 0x0_3400_FFFF LSIO_SUB 64KB SPI0
0x0_3401_0000 0x0_3401_FFFF 64KB SPI1
0x0_3402_0000 0x0_3402_FFFF 64KB SPI2
0x0_3403_0000 0x0_3403_FFFF 64KB SPI3
0x0_3404_0000 0x0_3404_FFFF 64KB SPI4
0x0_3405_0000 0x0_3405_FFFF 64KB SPI5
0x0_3406_0000 0x0_3406_FFFF 64KB UART0_4-wire
0x0_3407_0000 0x0_3407_FFFF 64KB UART1_2-wire
0x0_3408_0000 0x0_3408_FFFF 64KB UART2_2-wire
0x0_3409_0000 0x0_3409_FFFF 64KB UART3_2-wire
0x0_340A_0000 0x0_340A_FFFF 64KB UART4_2-wire
0x0_340B_0000 0x0_340B_FFFF 64KB I2C0
0x0_340C_0000 0x0_340C_FFFF 64KB I2C1
0x0_340D_0000 0x0_340D_FFFF 64KB I2C2
0x0_340E_0000 0x0_340E_FFFF 64KB I2C3
0x0_340F_0000 0x0_340F_FFFF 64KB I2C4
0x0_3410_0000 0x0_3410_FFFF 64KB LPWM0
0x0_3411_0000 0x0_3411_FFFF 64KB LPWM1
0x0_3412_0000 0x0_3412_FFFF 64KB GPIO0
0x0_3413_0000 0x0_3413_FFFF 64KB GPIO1
0x0_3414_0000 0x0_3414_FFFF 64KB PWM0
0x0_3415_0000 0x0_3415_FFFF 64KB PWM1
0x0_3416_0000 0x0_3416_FFFF 64KB PWM2
0x0_3417_0000 0x0_3417_FFFF 64KB PWM3
0x0_3418_0000 0x0_3418_FFFF 64KB LSIO_SLCR
0x0_3419_0000 0x0_3419_FFFF 64KB ADC
0x0_341A_0000 0x0_341A_FFFF 64KB UART5_2-wire
0x0_341B_0000 0x0_341B_FFFF 64KB UART6_2-wire
0x0_341C_0000 0x0_341C_FFFF 64KB I2C5
0x0_341D_0000 0x0_341D_FFFF 64KB I2C6
0x0_341E_0000 0x0_341F_FFFF N/A 128KB reserved
0x0_3420_0000 0x0_3420_FFFF A55-APB0 64KB DMA
0x0_3421_0000 0x0_3421_FFFF 64KB TOP_CRM
0x0_3422_0000 0x0_3422_FFFF 64KB reserved
0x0_3423_0000 0x0_3423_7FFF 32KB NON_SEC_SYS_CTL
0x0_3423_8000 0x0_3423_FFFF 32KB SEC_SYS_CTL
0x0_3424_0000 0x0_3424_FFFF 64KB PVT
0x0_3425_0000 0x0_3425_FFFF 64KB WDT
0x0_3426_0000 0x0_3426_FFFF 64KB timer0
0x0_3427_0000 0x0_3427_FFFF 64KB timer1
0x0_3428_0000 0x0_34FF_FFFF Reserved 13.5MB Reserved
0x0_3500_0000 0x0_3500_FFFF QSPI-AHB 64KB QSPI
0x0_3501_0000 0x0_3501_FFFF HSIO-APB 64KB GMAC
0x0_3502_0000 0x0_3502_FFFF 64KB SDIO0
0x0_3503_0000 0x0_3503_FFFF 64KB SDIO1
0x0_3504_0000 0x0_3504_FFFF 64KB EMMC
0x0_3505_0000 0x0_3505_FFFF 64KB HSIO_SLCR
0x0_3506_0000 0x0_3506_FFFF 64KB HSIO_GPIO0
0x0_3507_0000 0x0_3507_FFFF 64KB HSIO_GPIO1
0x0_3508_0000 0x0_350F_FFFF 512KB reserved
0x0_3510_0000 0x0_352F_FFFF 2048KB USB3.0
0x0_3530_0000 0x0_354F_FFFF 2048KB USB2.0
0x0_3550_0000 0x0_3551_FFFF QSPI-AHB 128KB QSPI XIP flash address
0x0_3580_0000 0x0_35FF_FFFF Reserved 8MB Reserved
0x0_3600_0000 0x0_39FF_FFFF DDR-CFG 64MB DDR-CFG
0x0_3A00_0000 0x0_3A00_FFFF BPU 64KB BPU
0x0_3A01_0000 0x0_3A01_FFFF 64KB BPU_SCLR
0x0_3A02_0000 0x0_3AFF_FFFF Reserved 15.875MB Reserved
0x0_3B00_0000 0x0_3B00_FFFF video-APB 64KB video codec
0x0_3B01_0000 0x0_3B01_FFFF 64KB MJPEG
0x0_3B02_0000 0x0_3B02_FFFF 64KB CODEC_SLCR
0x0_3B03_0000 0x0_3BFF_FFFF Reserved 15.8125MB Reserved
0x0_3C00_0000 0x0_3C00_FFFF GPU-APB 64KB GC8000L
0x0_3C01_0000 0x0_3C01_FFFF 64KB GC820
0x0_3C02_0000 0x0_3C02_FFFF 64KB GPU_SLCR
0x0_3C03_0000 0x0_3CFF_FFFF Reserved 15.8125MB Reserved
0x0_3D00_0000 0x0_3D00_FFFF Camera-APB 64KB ISP8000
0x0_3D01_0000 0x0_3D01_FFFF 64KB DW230
0x0_3D02_0000 0x0_3D02_FFFF 64KB SIF0
0x0_3D03_0000 0x0_3D03_FFFF 64KB SIF1
0x0_3D04_0000 0x0_3D04_FFFF 64KB SIF2
0x0_3D05_0000 0x0_3D05_FFFF 64KB SIF3
0x0_3D06_0000 0x0_3D06_FFFF 64KB MIPI-CSI0
0x0_3D07_0000 0x0_3D07_FFFF 64KB MIPI-CSI1
0x0_3D08_0000 0x0_3D08_FFFF 64KB MIPI-CSI2
0x0_3D09_0000 0x0_3D09_FFFF 64KB MIPI-CSI3
0x0_3D0A_0000 0x0_3D0A_FFFF 64KB csi_wrapper_gpr
0x0_3D0B_0000 0x0_3D0B_FFFF 64KB Camera-SLCR
0x0_3D0C_0000 0x0_3D0C_FFFF 64KB GDC
0x0_3D0D_0000 0x0_3DFF_FFFF Reserved 15.1875MB Reserved
0x0_3E00_0000 0x0_3E00_FFFF DIS-APB 64KB DC8000Nano
0x0_3E01_0000 0x0_3E01_FFFF 64KB BT1120
0x0_3E02_0000 0x0_3E03_FFFF 128KB MIPI-CSI TX
0x0_3E04_0000 0x0_3E05_FFFF 128KB DIS_GPIO
0x0_3E06_0000 0x0_3E07_FFFF 128KB MIPI-DSI TX
0x0_3E08_0000 0x0_3E09_FFFF 128KB SIF
0x0_3E0A_0000 0x0_3E0A_FFFF 64KB DIS-SLCR
0x0_3E0B_0000 0x0_3FFF_FFFF Reserved 31.3125MB Reserved
0x0_8000_0000 0x2_7FFF_FFFF LPDDR4/4X 8GB DDR memory

4.3.1.2. Memory address space

The X5 address space mapping table shows three types of memory address spaces:

  1. Boot ROM: Read-Only Memory, used to store the firmware code when the chip is started

  2. SRAM: Integrated inside the chip, it has high-speed access performance, but its capacity is limited, and the overall size is 1856KB. See SRAM Address Space for details

  3. SDRAM (DDR): external LPDDR4/4X, used as the main memory of the system, with a maximum support of 8GB, see DDR address space

The SRAM address space and DDR address space will be described in detail respectively in the future.

SRAM and DDR address spaces

SRAM address space

Area Start Address End Address SIZE
SRAM0 0x0_1FE8_0000 0x0_1FEF_FFFF 512KB
SRAM1 0x0_1FF0_0000 0x0_1FFF_FFFF 1024KB
AON SRAM 0x0_2000_0000 0x0_2001_FFFF 128KB
HIFI5 SRAM 0x0_2020_0000 0x0_2022_FFFF 192KB

Note: HIFI5 SRAM can only be used by ADSP

DDR address space

Area Start Address End Address SIZE
DDR 0x0_8000_0000 0x2_7FFF_FFFF 8GB

SRAM and DDR address space usage

SRAM and DDR are used by the following components:

  • Startup code: such as BL2 and BL31, used to boot and initialize the system.

  • Security-related code: Includes OPTEE OS and OPTEE shared memory, used to implement security functions of the system.

  • Linux system: as the main memory resource when the operating system is running.

Function Start Address End Address SIZE Memory Type Is Resident Is the Address Space Secure
BL2 0x1FEA_0000 0x1FEF_C000 368K SRAM Non-Secure
BL31 0x2000_0000 0x2002_0000 128K SRAM Residence Secure
OPTEE OS 0x8000_0000 0x8200_0000 32M DDR Residence Secure
OPTEE Shared Memory 0x8200_0000 0x8400_0000 32M DDR Residence Non-Secure
UBOOT 0x8800_0000 0x9000_0000 128M DDR Non-Secure
Linux system 0x8400_0000 0x8000_0000 + DDR Capacity DDR Capacity -64MB DDR Residence Non-Secure

  • In the above table, there are two cases: non-resident and resident.

  • Non-resident: after the corresponding phase startup process is finished, it is no longer used and can be used by subsequent code.

  • Resident: it will continue to be used after the corresponding stage initiation process is finished.

  • In the above table, there are two options for Whether the address space is Secure: Non-Secure and Secure.

  • Non-Secure and Secure

  • Non-Secure and Secure Secure are used for storing and executing code and data with high security requirements.

  • Only code running in the Secure World can access it.

  • Commonly used to run trusted firmware (e.g. BL31 or OPTEE OS in ARM TrustZone) to protect sensitive data (e.g. passwords, keys) and functions.

  • Non-Secure

  • Used to store and execute general purpose code and data.

  • It can be accessed by the Non-Secure World.

  • The memory space of UBOOT is described below:

  • The UBOOT starts at 0x8800_0000 and ends at 0x9000_0000. This overlaps with the Linux system memory space (0x8400_0000 - 0x8000_0000 + DDR capacity).

This is because UBOOT’s memory is very resident; it is freed when UBOOT finishes booting, after which the kernel can reuse the area from 0x8800_0000 to 0x9000_0000.

  • The start address, end address, and size of the Linux system are explained below:

  • The start address is 0x8400_0000 for the following reasons:

  • The starting address is 0x8400_0000 for the following reason: The starting address of the DDR address space is 0x8000_0000.

  • The OPTEE OS and OPTEE shared memory occupy a total of 64MB of space.

  • The end address is 0x8000_0000 + DDR capacity for the following reason:

  • The start address of the DDR address space is 0x8000_0000.

  • The maximum DDR address space is 8G, and the end address is determined by the actual DDR capacity.

  • Size is DDR capacity - 64MB, the reason is as follows:

  • OPTEE OS and OPTEE shared memory occupy a total of 64MB of space

Linux System Memory Usage

From the description in DDR Address Space , we can know that the DDR range that Linux system can access by default is:

  • Starting address: 0x8400_0000

  • Start address: 0x8400_0000 End address: 0x8000_0000 + DDR capacity

The Linux Kernel reserves a portion of memory in the device tree for the exclusive use of certain modules, the following table lists all the memory reserved in the device tree:

memory_division memory_role memory_area memory_size
uboot_log_reserved Used to fetch boot logs at the kernel 0x87FFC000...0x87FFFFFF 16KB(0x4000)
cma kernel CMA Memory Area 0x88000000..0x9FDFFFFF 382MB(0x17E00000)
firewall_ddr_default Address to be automatically directed to when firewall access violations occur 0x9FE7F000..0x9FE7FFFF 4KB(0x1000)
adsp_ ddr space used by ADSP firmware in memory 0x9FE80000..0xA207FFFF 34MB(0x2200000)
ramoops temporary memory used by kernel ramoops 0xA4080000..A40BFFFF 256KB(0x40000)
ion ION area 0xA4100000... (ION cutoff address ) varies according to user configuration

  • Please refer to X5 default ION reserved memory

  • The reserved address space is defined in the arch/arm64/boot/dts/hobot/x5-memory.dtsi file in the kernel folder of the BSP source code package

You can use the cat /proc/iomem command to obtain the allocation of system memory (as an example of a board-side system with 4GB memory):

Analyze system memory:
# cat /proc/iomem
20500000-205000ff : 20500000.cpu_ace_qos cpu_ace_qos@20500000
20500100-2050017f : 20500100.cpu_perif_qos cpu_perif_qos@20500100
20510000-2051007f : 20510000.bt1120_qos bt1120_qos@20510000
20510080-205100ff : 20510080.dc8000_qos dc8000_qos@20510080
20510100-2051017f : 20510100.dw230_gdc_qos dw230_gdc_qos@20510100
20510180-205101ff : 20510180.dw230_scalar2_qos dw230_scalar2_qos@20510180
20510200-2051027f : 20510200.dw230_scalar3_qos dw230_scalar3_qos@0x20510200
20510280-205102ff : 20510280.isp_axi5_hdr_qos isp_axi5_hdr_qos@20510280
20510300-2051037f : 20510300.isp_axi4_mcm_qos isp_axi4_mcm_qos@20510300
20510380-205103ff : 20510380.isp_axi3_sp2_qos isp_axi3_sp2_qos@20510380
20510480-205104ff : 20510480.isp_axi1_mp_qos isp_axi1_mp_qos@20510480
20510500-2051057f : 20510500.sif0_qos sif0_qos@20510500
20510580-205105ff : 20510580.sif1_qos sif1_qos@20510580
20510600-2051067f : 20510600.sif2_qos sif2_qos@20510600
20510680-205106ff : 20510680.sif3_qos sif3_qos@20510680
20510700-2051077f : 20510700.sif_disp_qos sif_disp_qos@20510700
20520000-2052007f : 20520000.bpu_qos bpu_qos@20520000
20530000-2053007f : 20530000.video_qos video_qos@20530000
20530080-205300ff : 20530080.jpeg_qos jpeg_qos@20530080
20540000-2054007f : 20540000.gpu2d_qos gpu2d_qos@20540000
20540080-2054017f : 20540080.gpu3d_qos gpu3d_qos@20540080
20550000-2055007f : 20550000.dma0_qos dma0_qos@20550000
20550080-205500ff : 20550080.emmc_qos emmc_qos@20550080
20550100-2055017f : 20550100.gmac_qos gmac_qos@20550100
20550180-205501ff : 20550180.sd_qos sd_qos@20550180
20550200-2055027f : 20550200.sdio_qos sdio_qos@20550200
20550280-205502ff : 20550280.security_qos security_qos@20550280
20550300-2055037f : 20550300.usb2_qos usb2_qos@20550300
20550380-205503ff : 20550380.usb3_qos usb3_qos@20550380
20550400-2055047f : 20550400.etr_qos etr_qos@20550400
20560000-2056007f : 20560000.hifi5_qos hifi5_qos@20560000
2c001000-2c001fff : funnel@2c001000
  2c001000-2c001fff : 2c001000.funnel funnel@2c001000
2c002000-2c002fff : etf@2c002000
  2c002000-2c002fff : 2c002000.etf etf@2c002000
2c003000-2c003fff : etr@2c003000
  2c003000-2c003fff : 2c003000.etr etr@2c003000
2c004000-2c004fff : replicator@2c004000
  2c004000-2c004fff : 2c004000.replicator replicator@2c004000
2c005000-2c005fff : tpiu@2c005000
  2c005000-2c005fff : 2c005000.tpiu tpiu@2c005000
2c006000-2c006fff : cti@2c006000
  2c006000-2c006fff : 2c006000.cti cti@2c006000
2d020000-2d020fff : cti@2d020000
  2d020000-2d020fff : 2d020000.cti cti@2d020000
2d040000-2d040fff : etm@2d040000
  2d040000-2d040fff : 2d040000.etm etm@2d040000
2d120000-2d120fff : cti@2d120000
  2d120000-2d120fff : 2d120000.cti cti@2d120000
2d140000-2d140fff : etm@2d140000
  2d140000-2d140fff : 2d140000.etm etm@2d140000
2d220000-2d220fff : cti@2d220000
  2d220000-2d220fff : 2d220000.cti cti@2d220000
2d240000-2d240fff : etm@2d240000
  2d240000-2d240fff : 2d240000.etm etm@2d240000
2d320000-2d320fff : cti@2d320000
  2d320000-2d320fff : 2d320000.cti cti@2d320000
2d340000-2d340fff : etm@2d340000
  2d340000-2d340fff : 2d340000.etm etm@2d340000
2d420000-2d420fff : cti@2d420000
  2d420000-2d420fff : 2d420000.cti cti@2d420000
2d440000-2d440fff : etm@2d440000
  2d440000-2d440fff : 2d440000.etm etm@2d440000
2d520000-2d520fff : cti@2d520000
  2d520000-2d520fff : 2d520000.cti cti@2d520000
2d540000-2d540fff : etm@2d540000
  2d540000-2d540fff : 2d540000.etm etm@2d540000
2d620000-2d620fff : cti@2d620000
  2d620000-2d620fff : 2d620000.cti cti@2d620000
2d640000-2d640fff : etm@2d640000
  2d640000-2d640fff : 2d640000.etm etm@2d640000
2d720000-2d720fff : cti@2d720000
  2d720000-2d720fff : 2d720000.cti cti@2d720000
2d740000-2d740fff : etm@2d740000
  2d740000-2d740fff : 2d740000.etm etm@2d740000
30100000-3010ffff : GICD
30140000-3023ffff : GICR
31000000-3100ffff : 31000000.gpio gpio@31000000
31010000-3101ffff : 31010000.rtc rtc@31010000
31020000-31020fff : 31020000.aon-clock-controller aon-clock-controller@31020000
31021008-3102100b : 31021008.socinfo socinfo
31030000-310310ff : 31030000.power-controller power-controller@31030000
31032000-310330ff : 31032000.idle-controller idle-controller@31032000
31040000-31040013 : 31040000.aon_iomuxc aon_iomuxc@31040000
31040014-31040113 : 31040014.dsp_iomuxc dsp_iomuxc@31040014
32080000-320803ff : 32080000.dma-controller dma-controller@32080000
320a0000-320affff : 320a0000.i2c i2c@320a0000
320d0000-320dffff : 320d0000.archband_pdm archband_pdm@320d0000
32120000-3212001f : serial
32140000-321410ff : 32140000.dsp-clock-controller dsp-clock-controller@32140000
32150000-3215ffff : 32150000.gpio gpio@32150000
33000000-33000fff : 33000000.mailbox0 mailbox0@33000000
34020000-3402ffff : 34020000.spi spi@34020000
34080000-3408001f : serial
340c0000-340cffff : 340c0000.i2c i2c@340c0000
340d0000-340dffff : 340d0000.i2c i2c@340d0000
340f0000-340fffff : 340f0000.i2c i2c@340f0000
34100000-3410ffff : 34100000.lpwm lpwm@34100000
34110000-3411ffff : 34110000.lpwm lpwm@34110000
34120000-3412ffff : 34120000.gpio gpio@34120000
34130000-3413ffff : 34130000.gpio gpio@34130000
34160000-3416ffff : 34160000.pwm pwm@34160000
34180000-341801ff : 34180000.lsio_iomuxc lsio_iomuxc@34180000
34190000-3419ffff : 34190000.adc adc@34190000
341a0000-341a001f : serial
341c0000-341cffff : 341c0000.i2c i2c@341c0000
34200000-342003ff : 34200000.dma-controller dma-controller@34200000
34210000-342123ff : 34210000.hps-clock-controller hps-clock-controller@34210000
34240000-3424007f : 34240000.pvt common
34240080-3424017f : 34240000.pvt ts
34240180-342401ff : 34240000.pvt pd
34240400-34240bff : 34240000.pvt vm
34250000-3425ffff : 34250000.watchdog watchdog@34250000
35000000-35000fff : 35000000.spi spi@35000000
35010000-3501ffff : 35010000.horizon_tsn horizon_tsn@35010000
35020000-3502ffff : 35020000.sdhci sdhci@35020000
35030000-3503ffff : 35030000.sdhci sdhci@35030000
35040000-3504ffff : 35040000.sdhci sdhci@35040000
35050000-350501ff : 35050000.hsio_iomuxc hsio_iomuxc@35050000
35060000-3506ffff : 35060000.gpio gpio@35060000
35070000-3507ffff : 35070000.gpio gpio@35070000
35100000-35107fff : usb@35100000
  35100000-35107fff : xhci-hcd.3.auto usb@35100000
3510c100-3510ffff : 35100000.usb usb@35100000
3530c100-3537ffff : 35300000.usb usb@35300000
38100000-3810ffff : 38100000.axi-mon axi-mon@38100000
38200000-382000ff : 38200000.dfi-monitor dfi-monitor
38300000-38300fff : 38200000.dfi-monitor dfi-monitor
3a000000-3a00ffff : 3a000000.bpu reg
3a010030-3a010043 : 3a010030.bpu_iommu bpu_iommu@3a010030
3b000000-3b00ffff : 3b000000.vpu
3b010000-3b01ffff : 3b010000.jpu
3b020004-3b020017 : 3b020004.vpu_iommu vpu_iommu@3b020004
3b020018-3b02002b : 3b020018.jpu_iommu jpu_iommu@3b020018
3c000000-3c00ffff : galcore register region
3c010000-3c01ffff : nano2d register region
3c020040-3c020053 : 3c020040.gc820_iommu gc820_iommu@3c020040
3d000000-3d00ffff : 3d000000.isp reg
3d010000-3d01ffff : 3d010000.vse reg
3d020000-3d02ffff : 3d020000.sif reg
3d030000-3d03ffff : 3d030000.sif reg
3d040000-3d04ffff : 3d040000.sif reg
3d050000-3d05ffff : 3d050000.sif reg
3d060000-3d06ffff : 3d060000.mipi_host reg
3d070000-3d07ffff : 3d070000.mipi_host reg
3d080000-3d08ffff : 3d080000.mipi_host reg
3d090000-3d09ffff : 3d090000.mipi_host reg
3d0a0000-3d0affff : 3d0a0000.csi_wrapper reg
3d0b0000-3d0b000f : 3d0b0000.cam_ctrl reg
3d0b0010-3d0b0023 : 3d0b0010.vse_iommu vse_iommu@3d0b0010
3d0b0024-3d0b0037 : 3d0b0024.cam_sif_iommu cam_sif_iommu@3d0b0024
3d0b0038-3d0b004b : 3d0b0038.isp_iommu isp_iommu@3d0b0038
3d0b004c-3d0b005f : 3d0b004c.gdc_iommu gdc_iommu@3d0b004c
3d0b008c-3d0b00a3 : 3d0b008c.cam_pulse reg
3e0a0028-3e0a0053 : 3e0a0028.phy phy@3e0a0028
3e0a0054-3e0a009f : 3e0a0054.disp_iomuxc disp_iomuxc@3e0a0054
3e0a0130-3e0a0143 : 3e0a0130.dc_iommu dc_iommu@3e0a0130
3e0a0144-3e0a0157 : 3e0a0144.bt1120_iommu bt1120_iommu@3e0a0144
3e0a0158-3e0a016b : 3e0a0158.sif_iommu sif_iommu@3e0a0158
84000000-9fe7efff : System RAM
  84010000-84e5ffff : Kernel code
  84e60000-8507ffff : reserved
  85080000-854cffff : Kernel data
  87fd3000-87ff8fff : reserved
  87ffc000-9fdfffff : reserved
9fe7f000-a207ffff : reserved
a2080000-17fffffff : System RAM
  a2080000-a40bffff : reserved
  a4100000-1440fffff : reserved
  17b000000-17f5fffff : reserved
  17f664000-17f6c3fff : reserved
  17f6c4000-17f6c4fff : reserved
  17f6c5000-17f754fff : reserved
  17f756000-17f758fff : reserved
  17f759000-17f759fff : reserved
  17f75a000-17f76bfff : reserved
  17f76c000-17fffffff : reserved

The above log output content can correspond to address space table. At the same time, it can be seen that the memory area can be mainly divided into the following parts:

  1. QOS (Quality of Service) area: There are multiple memory segments in the log starting with 20500000, which are usually related to the bandwidth and resource management of the hardware module. The name of each area is followed by the identification of the hardware module, for example:

    • 20500000-205000ff : 20500000.cpu_ace_qos cpu_ace_qos@20500000 represents the QOS area of ​​the CPU ACE (Accelerator Coherence Engine) module. -Other similar areas include bt1120_qos, dc8000_qos, video_qos, etc. These modules involve video, GPU, DMA (direct memory access) and other functions. These QOS areas are often used to ensure bandwidth and timing requirements between different hardware modules, ensuring priority and quality of data transmission.

  2. Peripheral controller and drive area: Next is the memory area of ​​the controller and peripherals. For example:

    • 31000000-3100ffff : 31000000.gpio gpio@31000000 represents the memory area of ​​the GPIO controller.

    • 34020000-3402ffff : 34020000.spi spi@34020000 represents the memory area of ​​the SPI (serial peripheral interface). These areas correspond to the memory areas used by the device driver, for accessing external hardware or controlling external devices.

  3. Debugging and monitoring areas: Areas for hardware debugging and monitoring, such as:

    • 38100000-3810ffff : 38100000.axi-mon axi-mon@38100000 represents the memory area for AXI bus monitoring.

    • 3a000000-3a00ffff : 3a000000.bpu reg represents the register area of ​​the BPU (bandwidth processing unit). These areas are mainly used to track and analyze the state and performance of the hardware in real time.

  4. Memory reserved area: There is a large area in the log that is marked “reserved”, such as:

    • 84010000-84e5ffff : Kernel code

    • a2080000-17ffffffff : System RAM Most of these areas are used for the system’s kernel code, kernel data, and some memory areas reserved for specific purposes, such as firmware or memory mapped IO. The reserved area is usually memory used by the firmware or kernel and cannot be accessed directly.

  5. System RAM area System RAM is the main memory of the computer and is often used to store operating systems, applications, and other data. Multiple memory areas are displayed in the log:

    • 84000000-9fe7efff : System RAM This represents the main memory area, including kernel code, data, and other reserved areas. In which further memory partitioning shows areas of different purposes in memory. The following is a detailed analysis of each part:

    1. 84000000-9fe7efff: System RAM

      • Scope: 84000000 to 9fe7efff, which represents the total area of ​​the system’s physical memory, starting from the 84000000 address and ending at the 9fe7effff address. All applications, kernels, and other processes of the system will use this part of the memory.

    2. 84010000-84e5ffff: Kernel code

      • Scope: 84010000 to 84e5ffff, this part of the memory is dedicated to storing kernel code. Kernel code is the core part of the operating system, responsible for managing hardware, resource scheduling, process management, etc.

      • Memory usage: The kernel code part is usually read-only because it does not allow modifications when **is run. The startup of the operating system, system calls, etc. all need to be run in this part of the memory.

      • Loading method: When the operating system starts, the kernel code will be loaded into this part of the memory area for the system to run.

    3. 84e60000-8507ffff : reserved

      • Scope: 84e60000 to 8507ffff, this part is marked as Reserved Area, i.e. it is not used by kernel code or data, usually the space reserved by the system, which may be reserved for future upgrades, memory mapping of hardware, or interaction with other hardware modules (such as firmware, I/O control, memory mapping device).

      • Purpose: The specific purpose of the reserved area depends on the hardware and system design. They are not assigned directly to the operating system or application, but may be used by firmware or hardware devices.

      • Protection: These areas may be protected by the system and are not allowed to be accessed by conventional programs to prevent interference with system stability.

    4. 85080000-854cffff : Kernel data

      • Scope: 85080000 to 854cffff, this part of the memory is used to store kernel data. Kernel data is the variables, structures and other dynamic data required by the kernel at runtime.

      • Memory usage: This part of the memory stores dynamic data related to the kernel, such as task scheduling information, file system cache, network buffer, etc. Unlike kernel code, this part of the memory content is readable and written during operation.

      • Loading method: When the operating system is loading, this part of the memory is used by the kernel to store the running state, kernel modules, etc.

Default ION Reserved Memory

  • Please refer to the use of each ION area: ION System Debug Guide

  • xg in the header: represents the suffix of the ion reserved spatial node name in the Linux Kernel device tree. Since different default definitions are made for different DDR capacity, xg is used to represent capacity

  • For example, the device tree nodes represented by ion_reserved_xg: ion_reserved_1g, ion_reserved_2g, ion_reserved_ge4g

Memory size DDR Overall Address Space ion_reserved_xg Address Space ion_carveout_xg Address Space ion_cma_xg Address Space
1G Start: 0x0_8000_0000
Termination: 0x0_BFFF_FFFF		 Start: 0x0_A410_0000
Termination: 0x0_AB0F_FFFF (112M)		 Start: 0x0_0AB10_0000
Termination: 0x0_0B20F_FFFF (112M)		 Start: 0x0B_210_0000
Termination: 0x0_B24F_FFFF (64M)
2G Start: 0x0_8000_0000
Termination: 0x0_FFFF_FFFF		 Start: 0x0_A410_0000
Termination: 0x0_C40F_FFFF (512M)		 Start: 0x0_0C410_0000
Termination: 0x0_0C40F_FFFF (512M)		 Start: 0x0E_410_0000
Termination: 0x0_F00F_FFFF (192M)
4G or more Start: 0x0_8000_0000
Termination: 0x1_7FFF_FFFF		 Start: 0x0_A410_0000
Termination: 0x0_E40F_FFFF (1G)		 Start: 0x0_0E410_0000
Termination: 0x0_1240F_FFFF (1G)		 Start: 0x12_410_0000
Termination: 0x1_440F_FFFF (512M)

According to the log output from the previous cat /proc/iomem command, in a 4GB DDR board-side system, the memory reserved by ION is:

a4100000-1440fffff : reserved

The memory range a4100000-1440fffff has a size of 2.5 GB, which matches the value in the table above.