[2023-03-09 11:28:47.789]# RECV ASCII>
NOTICE:  fast_boot:0

S
F
L
O
NOTICE:  efuse cpu_cfg = 0
W
NOTICE:  Booting Trusted Firmware
NOTICE:  BL1: v1.4(release):HR-ROM-Rel-v1.1-141-ga91d4dd-dirty
NOTICE:  BL1: Built : 11:24:44, Oct 23 2019
NOTICE:  boot src: 2
NOTICE:  GigaDev SPI NAND was found.
NOTICE:  Block size: 128 KiB, page size: 2048


[2023-03-09 11:28:47.911]# RECV ASCII>
NOTICE:  BL1: Booting BL2
Auth pass
NOTICE:  bl1_main exit
*** SPL abnormal reset flow (do not re-init ddr) ***
check_reset_state (3): wakeup address = 0x0, hw wakeup status = 0x3, wakeup src=0x100
patch for sys_pll 1200 with 100M eth
SFLOW_INIT
CHIP ID:P0C140/WAFER: W07/ X: X11/ Y: Y26
secondary_jump_to_spl: secure chip flow
X3 SPL : secondary core wake up and jump to spl done (cpu_core_cfg=0)
SFLOW_FIN_HW_A

U-Boot SPL 2018.09-g685ea0924d (Jul 07 2022 - 16:15:50 +0800)
SPACC Init - ID: (00000

[2023-03-09 11:28:47.929]# RECV ASCII>
061)
SPL nand boot mode (from strap)
GigaDev SPI NAND was found.
Block size: 128 KiB, page size: 2048
ddr_type = 1 (LPDDR4)
hb_chip_package_type:3
load ddr header src_addr: 100000, load_addr: 802ca020, src_len: a00
find valid ddr image
ddr_hdr.ecc_gran: 0x0
ddr_hdr.ecc_map: 0x0
ddr_hdr.sbr_pattern0: 0x0
ddr_hdr.sbr_pattern1: 0x0
ddr_freq = 05
board id = 31540334
ddr datarate: 3200
### SAMSUNG DDR ###
no ddr pin set
detect part number: 108
detect ddr freq: c80
board id alternative:0x3
ind

[2023-03-09 11:28:47.937]# RECV ASCII>
ex is 12
index is 15
index is 19
hb_ddr_index: 19
ddr_type = 1, ddr_vendor=3, ddr_freq=3200
dram_pll_init
sscg disabled 
control load ddrc src_addr: 15a800, load_addr: 802caa20, src_len: 920
[DDR INFO] 	==ddr_release_info==
[DDR INFO] 	VERSION:	develop
[DDR INFO] 	BUILD:		2022-07-07-16:15
[DDR INFO] 	GIT COMMIT:	685ea0924d581ca988bce42c579b18c25bd53c4c
[DDR INFO] 	GIT TIME:	Thu, 7 Jul 2022 16:14:13 +0800
[DDR INFO] 	==ddr_features==
[DDR INFO] 	RDBI:		0
[DDR INFO] 	WDBI:		1
[DDR INFO] 	Inlin

[2023-03-09 11:28:47.943]# RECV ASCII>
eECC:	0
[DDR INFO] 	DM:		1
[DDR INFO] 	DDC:		1
[DDR INFO] 	SSCG:		0
[DDR INFO] 	BOARD:		XS_ENABLE
[DDR INFO] ddr_controller_cfg done
load ddr phy src_addr: 15b200, load_addr: 802caa20, src_len: 420
ATxSlewRate	: 15f
ATxImpedance	: 7f
TxSlewRate	: 19f
TxOdtDrvStren	: 600
TxImpedanceCtrl	: e3f
CalDrvStr0	: 11
VrefInGlobal	: 104
board_type = 4 (CUSTOMER_BOARD)
load dqmap src addr: 15d000, load_addr: 802caa20, src_len: 20
[DDR INFO] dwc_ddrphy_train start
magic = 544f4248
load imem1 src_addr: 

[2023-03-09 11:28:47.984]# RECV ASCII>
11ce00, load_addr: 802caa20, src_len: 8000
load dmem1 src_addr: 159a00, load_addr: 802caa20, src_len: 684
executing 1D fw
load imem2 src_addr: 124e00, load_addr: 802caa20, src_len: 8000
load dmem2 src_addr: 15a200, load_addr: 802caa20, src_len: 564

*******************************************************
p_dmem_lpddr4_2d_16b->MR11_A0:54
p_dmem_lpddr4_2d_16b->MR14_A0:54
p_dmem_lpddr4_2d_16b->MR12_A0:51
p_dmem_lpddr4_2d_16b->MR22_A0:14

p_dmem_lpddr4_2d_16b->MR3_A0:b3
p_dmem_lpddr4_2d_16b->Reserv

[2023-03-09 11:28:48.031]# RECV ASCII>
ed00:40
p_dmem_lpddr4_2d_16b->Reserved0E:4
p_dmem_lpddr4_2d_16b->Delay_Weight2D:20
p_dmem_lpddr4_2d_16b->Voltage_Weight2D:80
*******************************************************

executing 2D fw


[2023-03-09 11:28:48.298]# RECV ASCII>
load pie src_addr: 15b800, load_addr: 802caa20, src_len: 11f0
Set QoS.
get_ddr_mr_info:cs_num=1, mr5=0x1, mr8=0x10
no magic in efuse file,bypass efuse
total_sz = 4096
SPL_VERSION:7
uboot partition is uboot_A
load u-boot: src_addr=0x380000, dest_addr=0x4000000, len=2097152


[2023-03-09 11:28:48.848]# RECV ASCII>
load warm boot spl: addr=0x800, dest_addr=0x80000000, len=31232
load bl31: addr=0x300000, dest_addr=0x0, len=524288


[2023-03-09 11:28:49.006]# RECV ASCII>
SFLOW_AUTH_BL31
verify signature of header:  verify ok!
verify signature of image:  verify ok!
bypass bpu image
clear keybank!!!!
SFLOW_DBG_EN
Trying to boot from RAM
SPL: bl31 will jump to u-boot or other entry (0x4000000)
SFLOW_CLR_KEY
SFLOW_REG_LD
install_portal copy portal
install_portal call smc and jump to bl31 cold entry(0x0)


[2023-03-09 11:28:49.098]# RECV ASCII>
hb som type: 5
X3 PI reset VDD_SD done


[2023-03-09 11:28:49.223]# RECV ASCII>


U-Boot 2018.09-gafbe43f7 (Sep 01 2022 - 16:21:36 +0800)

Model: Hobot XJ3 Soc Board
DRAM:  system DDR size: 0xffe00000
4 GiB
MMC:   

[2023-03-09 11:28:49.515]# RECV ASCII>
dwmmc@A5010000: 0, dwmmc@A5011000: 1, dwmmc@A5012000: 2 (SD)
Loading Environment from UBI... GigaDevice SPI NAND was found.
128 MiB, block size: 128 KiB, page size: 2048, OOB size: 64


[2023-03-09 11:28:49.574]# RECV ASCII>
*** Warning - bad CRC, using default environment



[2023-03-09 11:28:49.745]# RECV ASCII>
In:    serial@a5000000
Out:   serial@a5000000
Err:   serial@a5000000
Net:   

[2023-03-09 11:28:49.943]# RECV ASCII>
x3 sdb reset eth phy done

Warning: ethernet@A5014000 (eth0) using random MAC address - de:2b:d1:34:00:0f
eth0: ethernet@A5014000
Disable cnn cores ..
dtb_name:hobot-x3-pi.dtb


[2023-03-09 11:28:50.037]# RECV ASCII>
base board type: X3 SDB
bootmode: NAND
board_id = 31540334
hb_boot_args_cmd_set custom_bootargs 0 ubuntu_boot 1
Hit any key to stop autoboot:  1 

[2023-03-09 11:28:51.042]# RECV ASCII>
 0 
enable watchdog success !


[2023-03-09 11:28:51.120]# RECV ASCII>
switch to partitions #0, OK
mmc2 is current device
Scanning mmc 2:1...
Found U-Boot script /boot.scr
2691 bytes read in 3 ms (876 KiB/s)
## Executing script at 03c10000
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
No FDT memory address configured. Please configure
the FDT address via "fdt addr <address>" command.
Aborting!